Analog Circuit Design: Smart Data Converters, Filters on by Michiel Steyaert, Herman Casier, Arthur H. M. van Roermund

By Michiel Steyaert, Herman Casier, Arthur H. M. van Roermund

Analog Circuit layout comprises the contribution of 18 tutorials of the 18th workshop on Advances in Analog Circuit layout. every one half discusses a particular to-date subject on new and precious layout rules within the sector of analog circuit layout. every one half is gifted through six specialists in that box and cutting-edge info is shared and overviewed. This ebook is quantity 18 during this winning sequence of Analog Circuit layout, offering worthy info and ideal overviews of: clever information Converters: Chaired by way of Prof. Arthur van Roermund, Eindhoven collage of know-how, Filters on Chip: Chaired by means of Herman Casier, AMI Semiconductor Fellow, Multimode Transmitters: Chaired by means of Prof. M. Steyaert, Catholic college Leuven, Analog Circuit layout is an important reference resource for analog circuit designers and researchers wishing to maintain abreast with the newest improvement within the box. the educational assurance additionally makes it appropriate to be used in a complicated layout.

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B. 2 GS/s fully dynamic pipeline ADC in 40 nm digital CMOS. IEEE J. Solid-State Circuits 45(10), 2080–2090 (2010) 58. T. 25–5 GHz clock generator with high-bandwidth supply-rejection using a regulated-replica regulator in 45-nm CMOS. IEEE J. Solid-State Circuits 44(11), 2901–2910 (2009) 59. R. , A 12-bit 80-MSample/s pipelined ADC with bootstrapped digital calibration. IEEE J. Solid-State Circuits 40(5), 1038–1046 (2005) 60. A. Panigada, I. Galton, A 130 mW 100 MS/s pipelined ADC with 69 dB SNDR enabled by digital harmonic distortion correction.

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